Quincy H. Dahilan

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JOB EXPERIENCE

Test Network Engineer (CIM)
Philips Semiconductors Calamba
#9 Mountain Drive, Light Industry and Science Park II,
Brgy. Lamesa, Calamba, Laguna, Philippines
From May 2000 to Mar 2001

Job Description:
Install, configure and connect to computer networks incoming tester machines in manufacturing floor in order to help provide production capacity and on-time test data feedback to the Philips Semiconductors Business Lines worldwide.

Responsibilities:

* Maintaining network security/integrity and connectivity of all test systems, wafer probers and post test platforms in order to maximize test production productivity in a secured environment. The list of maintained test platforms in Philips Semiconductors Calamba's Test Production Computer Networks are as follows;

o LTX Syncro/Fusion/77
o Credence Vista Series
o BP Chip Encoder Systems
o Teradyne A5xx Series
o SPEA Test Systems
o MCT Test Systems
o Philips' Turbo Parset
o Philips' Turbo NP
o ICOS Vision Systems
o RVSI Systemation STxxx series
o Electroglas Probers

* Qualifies new computer hardware/software for test platforms into PSC Test Network environment in order to verify intact data communication with other test systems regarding data feedback.

* Test Network infrastructure engineering, maintenance and troubleshooting by system administering different OS flavors such as Sun Solaris Unix (ver 2.5, 2.6, 7,8), SunOS Unix (BSD), HP-AUX Unix, SCO-Unix, Windows 2000/NT, DOS, RDOS, VAX/VMS, OS2/Warp and includes other network services such as follows;

o DNS - Domain Name Service
o NIS - Network Information Service
o 100% Server and Client data communications
o TCP/IP and NFS
o 100% Backup and Recovery of Production Data
o 100% Backup and Recovery of Engineering Data
o 100% TDF from Tester to Server
o 100% Tester Network Operations (7x24 support)

* Conducts technical training to users in order to disseminate technical knowledge and skills to other personnel involved in test engineering and operations.

* Reports, communicates and interfaces with different functional groups in PSC to address outstanding issues and solicit improvement actions.

* Upgrades computer software and hardware if and when necessary in order to ensure compliant to established Philips' standards.

Accomplishments:

* Elimination of Test Summary Print-out Project - This is to eliminate non-value added process of printing test summary whenever test operator finishes testing lot. Its significant impacts were saving printer toners, paper costs, and long queue time of printing test lot summary. Done Dec 2000 - Mar 2001

* Member Test Network Wiring Plan Project for the 2nd Building of PSC - In cooperation of local network wiring subcon service provider and PSC ISA, contributed the bandwidth computations and lay-out of 1st Building to 2nd Building network wiring connections and data communications. This was presented to mgmt's Engineering Manager and was approved. Done Sep 2000 - Jan 2001

* Created cron C-shell/PERL scripts for backup and recovery of test programs - These were network scripts for saving remotely from server to tester client programs used by test product engineering, it helped a lot on recovering lost test programs on ENG MODE inside the server. Done May 2000 - Dec 2000

* Established Standard Operating Procedure on setting up Teradyne A5XX's/Catalyst, LTX Fusion/Synchro, Credence Vista Series into PSC Test Network. Completed the writeup of SPECS on how to attached these testers' computer systems from power-off to power-on inside PSC Test Network. Done May 2000 - July 2000

* Test Program Administration Project - In PSC Test Engineering, test programs were coming into PSC Test Network file servers from Philips TDE worldwide. However, during the customizations of these programs to fit into local site, Test Engineers tends to circulate more than one copy of the programs. Realizing danger of loading unauthorized test programs, Test Network Eng'g created secured directories for test program classifications namely; 1) Engineering Mode - This dir is for newly FTP programs from various Philips' Semicon sites wherein local engineers can customize it, 2) Production Mode - After the customization of the pgms can ask sysad to put into this dir. This is the authorized dir wherein production can load from their test programs, and 3) Obsolete Mode - This is the dir for old revision test programs. Done Aug 2000 - Jan 2001 (Teradyne A5xx/Catalyst only)

* Inkless Wafer Project - In order to select bad die from wafers, the die bonding process should look into dies with ink mark and diebond machine should not pick to attach it on a bond pad. Implemented this from the file server using software and identifying good and bad dies, thus eliminating project saving wafer map files (Electroglas probers) in network file server (Dell Poweredge Server Computer). The diebond machine read/decodes the map ink marking on wafers. Jan 2001 - NA

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